Apple recently trademarked “Macroscalar” which gives a peep into what Apple A6 has to offer in iPad 3 and iPhone 5 (rumored). It is a new code optimization technique used in processors to keep instructions filled-in which proves a vital role for repetitive processes. Apple reportedly has 4 different patents, all related to “macroscalar process architecture” says Patently Apple.
A pipeline is simply the number of steps a instruction goes through from the start to the finish of a process. With the advancement of mobile processors the pipelines are made much longer which can hold more instructions. Apple aims at keeping these pipe lines full at all times, particularly when there is repetitive code for execution. The patented macroscalar technology helps in optimizing and detecting looping code which can be filled in the pipelines.
The macroscalar technique helps in running parallel code threads faster and also helps in putting the processor back into power idle state faster which helps in saving battery. These two factors play a vital role in modern day smartphones.
If the rumors are to be true and Apple A6 is supposed to be a quad-core processor then macroscalar technique will definitely defy benchmark results. More about the macroscalar and relevant patents can be found in below links.
- US Patent #7,395,419: Macroscalar processor architecture¬†
- US Patent #7,617,496: Macroscalar processor architecture
- US Patent #8,065,502: Macroscalar processor architecture